Floating point DSP processor in MCM single package
This module is based on 21020F DSP based core for embedded applications. It is an opened architecture that can be cascaded in large system thanks to 1355 high-speed links.
It is a QFP mono-cavity Multi Chip Module, designed in a radiation tolerant technology, qualified for space applications.
The MCM mono cavity hosts all the chips (µP, ASIC, SRAM, SMCS)
Features / technical details
- TECHNICAL FEATURES
- TSC21020F floating point DSP Harvard architecture. 32 bit/40bit IEEE floating point formats, 32 bit fixed point format with 80 bit accumulator, 3 independent computation units ; ALU, multiplier and barrel shifter.
- DPC ASIC controller
- 128 kwords on-module Program memory (external extension up ot 1 Mwords)
- 128 kword on-module Data memory (external extension up ot 1 Mwords)
- 20 MHz/40 Mflops (0ws) without memory protection
- 17.5 MHz/35 Mflops with parity error protection
- 15 MHz/30 Mflops (0ws) with EDAC memory protection
- 2 x 32 bit timers
- vHardware watch-dog
- Automatic initialisation through program bus via embedded DMA
- JTAG interface for tests
- A COMPREHENSIVE SET OF BUILT-IN USER INTERFACES
- 40 bits User interface
- 3 x 1355 standard interfaces with 8k x 32 bits dual port memory
- 16 bit I/O port with serial in, serial out, parallel in , parallel out capabilities
- UART interface
- Pulse generator
- 4 external interrupts
- JTAG interface (IEEE 1149.1 test port) for boundary scan and EZ-ICE in-circuit emulator
AN INNOVATIVE PACKAGE
The 21020F MCM fits an innovative Low Profile 334 I/O QFP package.
A POWERFUL SOFTWARE DEVELOPMENT ENVIRONMENT
The 21020F MCM application programming is supported by software tools such as:
- GENERAL FEATURES:
- Power supply 5V
- Power consumption: Stand-by 2W, Maximum (depending on programs) 8W.
- Mass and dimensions: 75 g, 98 x 116 x 5,1 mm
- Temperature range: -55°C to +85°C
Signal processing for FFT, algorithms, …
Alcatel, SES, Austrian aerospace, JPL, CRISA, Officine Galileo